Vseries Circuits / states definition
Analysed circuits. List of circuits to be monitored.
Each input and output circuit can be selected:
 Yes.
Any change of the related circuit state generates an
event.
The related circuit can be used for the definition of the interface states. No. A change of the circuit state is not taken into
account.
The circuit cannot be used for the definition of the interface states.
Quiescent state. Combination of the states of the circuits, significant
of the Quiescent state of the interface.
The matching state of each incput and output circuit can be defined.
In DTE or DCE emulation mode, the relevant output circuits are forced to the state On or
Off as defined to reach the Quiescent state.
 . State must be On. . State must be Off.
Signalling state. Combination of the states of the circuits, significant
of the Signalling state of the interface, if SL is defined.
The matching state of each incput and output circuit can be defined.
In DTE or DCE emulation mode, the relevant output circuits are forced to the state On or
Off as defined to reach the Signalling state.
- . State must be On.
- State must be Off.
- . Don't care state.
Data state. Combination of the states of the circuits, significant
of the Data state of the interface, if DL is defined.
The matching state of each incput and output circuit can be defined.
In DTE or DCE emulation mode, the relevant output circuits are forced to the state On or
Off as defined to reach the Data state.
- . State must be On.
- . State must be Off.
- . Don't care state.
X24 - V24. Reminder of the circuit equivalences between X24 and
V24.
- X24-C = V24-105
- X24-I = V24-109
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